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Analog Mixed Signal IO and Clocking Design Engineer
Location:
Hillsboro, OR
Description:
Job Description The Group:Intel's Advanced Design (AD) team resides within the Design Enablement (DE) organization which works in close collaboration with our partners in process technology, IP, and products spanning client/server and networking products. The primary focus of AD is to guide process technology definition, and design prototypes in Intel's latest process technology, supporting Intel's internal and external design customers.The Person:As an analog and mixed-signal designer within Intel's Design Enablement (DE) organization, your day-to-day responsibilities will include, but not always be limited to, utilizing the following skills:- Architect, design, and test PLL and Clocking circuits for high-speed wireline SerDes and integrate designs into Intel's first technology test chips.- Capture of design and measurement results to guide the next generation of process technology and I/O standards based on requirements for critical wireline interfaces.- Work closely with process, product/IP and communication standards engineers to anticipate interface requirements and use design and test results to accelerate process technology, product and standards development.#DesignEnablement Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Candidate must possess a M.S. degree with 10+ years of experience or Ph.D. degree with 5+ years of experience in Electrical, Computer or Electrical and Computer Engineering or related field and have demonstrated ability to do independent research to advance PLL and Clocking architecture and/or circuits. Experience in the architecture development, design and test of custom analog and mixed-signal circuits more than one of the following areas: - Phase Locked Loops (PLL)s, PLL sub-circuits such as Phase Frequency Detectors, Charge Pumps, High-Speed Clock Dividers, Time-to-Digital Converters (TDC) and Digital-to-Time Converters (DTC) - High performance Oscillators, electromagnetic elements such as inductors, transformers, transmission lines for wireline and wireless applications - Analog front-ends and equalizers utilizing BW extension techniques, high-speed ADCs and DACs - Modeling high-speed SerDes or RF/mm-wave systems or PLLs - Analog and digital filter design, digital signal processing (DSP) and digitally assistance for analog design - Analog, RF and Mixed-Signal design skills including specification, design, verification, and layout in advanced process technology nodes. Inside this Business Group As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth. Other Locations US, Santa Clara Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. Annual Salary Range for jobs which could be performed in US, California: $162,041.00-$259,425.00*Salary range dependent on a number of factors including location and experience Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. Requisition #: JR0262801pca3lyuhf
Company:
Intel
Posted:
April 20 on ITJobsWeb
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More About this Listing: Analog Mixed Signal IO and Clocking Design Engineer
Analog Mixed Signal IO and Clocking Design Engineer is a Engineering Design Engineer Job at Intel located in Hillsboro OR. Find other listings like Analog Mixed Signal IO and Clocking Design Engineer by searching Oodle for Engineering Design Engineer Jobs.
Analog Mixed Signal IO and Clocking Design Engineer is a Engineering Design Engineer Job at Intel located in Hillsboro OR. Find other listings like Analog Mixed Signal IO and Clocking Design Engineer by searching Oodle for Engineering Design Engineer Jobs.